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PD - 94506A
AUTOMOTIVE MOSFET
HEXFET(R) Power MOSFET
Features

IRFR3505 IRFU3505
VDSS = 55V
Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
D
G S
RDS(on) = 0.013 ID = 30A
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this product are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D-Pak IRFR3505 I-Pak IRFU3505
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS EAS EAS (tested) IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon limited) Continuous Drain Current, VGS @ 10V (See Fig.9) Continuous Drain Current, VGS @ 10V (Package limited) Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Single Pulse Avalanche Energy Tested Value Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
71 49 30 280 140 0.92 20 210 410 See Fig.12a, 12b, 15, 16 4.0 -55 to + 175 300 (1.6mm from case )
Units
A
W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount) Junction-to-Ambient
Typ.
--- --- ---
Max.
1.09 40 110
Units
C/W
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1
12/11/02
IRFR/U3505
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. 55 --- --- 2.0 41 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.057 0.011 --- --- --- --- --- --- 62 17 22 13 74 43 54 4.5 7.5 2030 470 91 2600 330 630
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.013 VGS = 10V, ID = 30A 4.0 V VDS = 10V, ID = 250A --- S VDS = 25V, ID = 30A 20 VDS = 55V, VGS = 0V A 250 VDS = 55V, VGS = 0V, TJ = 125C 200 VGS = 20V nA -200 VGS = -20V 93 ID = 30A 26 nC VDS = 44V 33 VGS = 10V --- VDD = 28V --- ID = 30A ns --- RG = 6.8 --- VGS = 10V D Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact S --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 44V, = 1.0MHz --- VGS = 0V, VDS = 0V to 44V
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 71 --- --- showing the A G integral reverse --- --- 280 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 30A, VGS = 0V --- 70 105 ns TJ = 25C, IF = 30A, VDD = 28V --- 180 270 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes
through
are on page 11
2
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IRFR/U3505
1000
TOP
VGS
1000
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
TOP
4.5V
10
10
4.5V 20s PULSE WIDTH Tj = 25C
0.1 1 10 100
1
1 0.1 1
20s PULSE WIDTH Tj = 175C
10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
70
G fs , Forward Transconductance (S)
ID, Drain-to-Source Current ()
T J = 25C T J = 175C
60 50 40 30 20 10 0
T J = 25C
100
T J = 175C
10
VDS = 25V
1 4.0 5.0 6.0
20s PULSE WIDTH
7.0 8.0 9.0 10.0
VDS = 25V 20s PULSE WIDTH 0 10 20 30 40 50 60 70 80 90
VGS , Gate-to-Source Voltage (V)
ID,Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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IRFR/U3505
4000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, Cds SHORTED gs Crss = C gd Coss = Cds + Cgd
20 ID= 30A
VGS , Gate-to-Source Voltage (V)
16
3000
C, Capacitance (pF)
VDS= 44V VDS= 28V VDS= 11V
12
2000
Ciss
8
1000
Coss
4
Crss
0 1 10 100
0 0 20 40 60 80 100 Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
1000 OPERATION IN THIS AREA LIMITED BY RDS(on)
100.0 T J = 175C 10.0
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100 100sec 10 Tc = 25C Tj = 175C Single Pulse 1 1 10
1.0
T J = 25C VGS = 0V
1msec
10msec 100 1000
0.1 0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-toDrain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR/U3505
80
2.5
ID , Drain Current (A)
60
RDS(on) , Drain-to-Source On Resistance
LIMITED BY PACKAGE
ID = 30A VGS = 10V
2.0
40
(Normalized)
1.5
20
1.0
0 25 50 75 100 125 150 175 T C , Case Temperature (C)
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50 0.20 0.10 0.05 0.02 0.01
0.01
0.1
SINGLE PULSE ( THERMAL RESPONSE )
0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR/U3505
400
EAS, Single Pulse Avalanche Energy (mJ)
15V
ID 12A 21A BOTTOM 30A
TOP
VDS
L
DRIVER
300
RG
20V VGS
D.U.T
IAS tp
+ V - DD
A
200
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
100
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
4.0
3.6
3.2
Charge
ID = 250A
2.8
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
2.4
50K 12V .2F .3F
2.0
D.U.T. VGS
3mA
+ V - DS
1.6 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRFR/U3505
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
10
0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
1
0.1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
240
EAR , Avalanche Energy (mJ)
200
T OP Single Pulse BOTT OM 10% Duty Cycle ID = 30A
160
120
80
40
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRFR/U3505
D.U.T
Driver Gate Drive P.W. Period VGS=10V
+
P.W.
Period
D=
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRFR/U3505
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 1.27 (.050) 0.88 (.035)
2.38 (.094) 2.19 (.086)
1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
6.45 (.245) 5.68 (.224) 6.22 (.245) 5.97 (.235) 1.02 (.040) 1.64 (.025) 1 2 3 0.51 (.020) MIN. 10.42 (.410) 9.40 (.370) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN -B1.52 (.060) 1.15 (.045) 3X 2X 1.14 (.045) 0.76 (.030) 0.89 (.035) 0.64 (.025) 0.25 (.010) M AMB NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 4.57 (.180) 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006).
0.58 (.023) 0.46 (.018)
2.28 (.090)
D-Pak (TO-252AA) Part Marking Information
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9
IRFR/U3505
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 1.27 (.050) 0.88 (.035)
2.38 (.094) 2.19 (.086) 0.58 (.023) 0.46 (.018) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
6.45 (.245) 5.68 (.224) 1.52 (.060) 1.15 (.045) 1 -B2.28 (.090) 1.91 (.075) 9.65 (.380) 8.89 (.350) 2 3 6.22 (.245) 5.97 (.235)
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006).
3X
1.14 (.045) 0.76 (.030)
3X
0.89 (.035) 0.64 (.025) M AMB
1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
2.28 (.090) 2X
0.25 (.010)
I-Pak (TO-251AA) Part Marking Information
10
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IRFR/U3505
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L = 0.47mH Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive R G = 25, IAS = 30A, VGS =10V. Part not avalanche performance. recommended for use above this value. This value determined from sample failure population. 100% ISD 30A, di/dt 300A/s, VDD V(BR)DSS, tested to this value in production. TJ 175C When mounted on 1" square PCB (FR-4 or G-10 Material) . Pulse width 1.0ms; duty cycle 2%. For recommended footprint and soldering techniques refer to application note #AN-994 Repetitive rating; pulse width limited by Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101]market. Qualification Standards can be found on IR's Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 12/02
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